The present disclosure relates to semiconductor structures, and, more specifically, to memory cells with read schemes and writes schemes, and methods of use.
Random access memory (RAM) may be static or dynamic. SRAM is a type of semiconductor memory that uses bistable latching circuitry to store each bit. The term static differentiates it from dynamic RAM (DRAM), which must be periodically refreshed. An SRAM cell has three different states: standby, read and write. The SRAM to operate in read mode and write mode should have “readability” and “write stability” respectively.
Current Decode Address Schemes for reading a memory requires multiplexing and Read Column Address (RCA) timing to properly access the correct memory bit. In addition, Current Decode Address Schemes for writing to a memory require multiple levels of decoding.